In 2022, Congress passed the CHIPS and Science Act to revitalize the domestic semiconductor industry and address barriers to continued progress. As part of this nationwide effort, GW Engineering is making a significant impact through assistant professor Weidong Cao’s collaboration on a transformative project: “GENIE-RFIC: Generative Engine for Intelligent and Expedited RFIC Design.” This project, funded by Natcast–a nonprofit created in response to the 2022 Act–is a centerpiece of their Artificial Intelligence Driven Radio Frequency Integrated Circuit Design Enablement Program.
Led by the University of Texas (UT) at Austin, GENIE-RFIC unites academic expertise and industry knowledge to drive innovation and secure U.S. leadership in semiconductor design. By leveraging artificial intelligence (AI) and machine learning (ML), the team will work to overcome pressing productivity challenges in conventional radio frequency integrated circuit (RFIC) design methods and produce optimized, non-intuitive solutions.
“Conventionally, every design stage is finished manually, meaning people try to stack transistors to build circuits and then manipulate device parameters to achieve the desired functionality. You can imagine this design process is time-consuming and costly,” said Cao.
Since RFICs are integral components of countless commercial systems–from wireless communication networks to IoT devices–their lengthy design time limits the semiconductor industry's efficiency and advancement. Mistakes also prove detrimental, as even one error in any step requires repeating the entire design flow. With AI and ML, the team will automate each stage in the design process in hopes of shortening design time and improving productivity by around 5 times.
In addition to UT Austin and GW Engineering, the project team includes UT Dallas, Rice University, and Purdue University, as well as leading semiconductor and electronic design automation companies Cadence, Keysight Technologies, and IBM. As a sub-awardee of this approximately $10 million project, Cao is leading efforts in circuit modeling to answer a pivotal question: "How can we use AI to predict circuit performance?"
By contributing his cutting-edge expertise in circuit optimization, Cao will enable manufacturers to harness AI and ML for rapid, inverse design. His work focuses on determining how to use AI models to efficiently estimate circuit performance based on device parameters and developing AI and ML techniques to identify optimal device parameters for specific design goals. This optimization process will empower manufacturers to meet design targets within technical constraints, making Cao’s work integral to the project’s success.
Cao’s involvement in GENIE-RFIC will also create valuable professional development opportunities for current and future GW Engineering students. Over the next three years, current students will be able to engage directly with peers at UT Austin each summer. Additionally, industry partners will provide them with essential networking experience and potential internship placements. In the coming years, Cao will develop and introduce new programs and courses, such as two classes focusing on ML-based electronic design automation for chip design and advanced ML techniques for accelerating computing system design, respectively.
By developing optimized, non-intuitive design methods, the team will also address complex challenges posed by future wireless applications, such as 5G connectivity, while simultaneously reducing the risks of investing in AI-enabled tools for RFIC design and accelerating their commercial adoption. As wireless technology becomes increasingly integral to daily life, these innovations will drive advancements across the semiconductor industry and ensure the U.S. remains at the forefront of technological progress.
“If, in the semiconductor race, the U.S. is the leading car, then with this AI-enabled technology, we’ll have an extra engine to gain more speed and power and have a global advantage in the competition and research,” Cao stated.